ferrog 7a1a8da39c Set Analog DAN on different CPU that ADC

2026-02-09 18:58:15 +00:00

EC-GN-JA-PCF-IN

Set Analog DAN on different CPU that ADC

2026-02-09 18:58:15 +00:00

ec-gn-ja-pcf-sdd-in @ 0ae9048c01

Corrected DAN Trigger PV name

2026-02-09 13:25:47 +00:00

patches

Fixing

2026-02-09 10:59:18 +00:00

.gitmodules

First commit

2025-05-13 13:40:11 +00:00

.marte_schema.cue

updated schema

2026-02-06 14:58:24 +01:00

generate.sh

Fixing

2026-02-09 10:59:18 +00:00

pom.xml

MARTe GYA cfg cleanup

2026-01-06 13:03:20 +00:00

Description

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4 MiB

Languages

C++ 80.3%

Makefile 9.3%

Python 7.7%

Shell 1.5%

C 1.2%