Generation working and Compilation of MARTe components
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ferrog
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#############################################################
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#
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# Copyright 2015 F4E | European Joint Undertaking for ITER
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# and the Development of Fusion Energy ('Fusion for Energy')
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#
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# Licensed under the EUPL, Version 1.1 or - as soon they
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# will be approved by the European Commission - subsequent
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# versions of the EUPL (the "Licence");
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# You may not use this work except in compliance with the
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# Licence.
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# You may obtain a copy of the Licence at:
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#
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# http://ec.europa.eu/idabc/eupl
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#
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# Unless required by applicable law or agreed to in
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# writing, software distributed under the Licence is
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# distributed on an "AS IS" basis,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either
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# express or implied.
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# See the Licence for the specific language governing
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# permissions and limitations under the Licence.
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#
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# $Id: Makefile.inc 3 2012-01-15 16:26:07Z aneto $
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#
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#############################################################
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OBJSX=JABitReverseGAM.x
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PACKAGE=GAMs
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ROOT_DIR=../../
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MAKEDEFAULTDIR=$(MARTe2_DIR)/MakeDefaults
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include $(MAKEDEFAULTDIR)/MakeStdLibDefs.$(TARGET)
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INCLUDES += -I.
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INCLUDES += -I$(MARTe2_DIR)/Source/Core/BareMetal/L0Types
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INCLUDES += -I$(MARTe2_DIR)/Source/Core/BareMetal/L1Portability
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INCLUDES += -I$(MARTe2_DIR)/Source/Core/BareMetal/L2Objects
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INCLUDES += -I$(MARTe2_DIR)/Source/Core/BareMetal/L3Streams
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INCLUDES += -I$(MARTe2_DIR)/Source/Core/BareMetal/L4Messages
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INCLUDES += -I$(MARTe2_DIR)/Source/Core/BareMetal/L4Configuration
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INCLUDES += -I$(MARTe2_DIR)/Source/Core/BareMetal/L5GAMs
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INCLUDES += -I$(MARTe2_DIR)/Source/Core/Scheduler/L1Portability
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INCLUDES += -I$(MARTe2_DIR)/Source/Core/Scheduler/L3Services
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INCLUDES += -I$(MARTe2_DIR)/Source/Core/Scheduler/L4Messages
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INCLUDES += -I$(MARTe2_DIR)/Source/Core/FileSystem/L1Portability
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INCLUDES += -I$(MARTe2_DIR)/Source/Core/FileSystem/L3Streams
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all: $(OBJS) $(SUBPROJ) \
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$(BUILD_DIR)/JABitReverseGAM$(LIBEXT) \
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$(BUILD_DIR)/JABitReverseGAM$(DLLEXT)
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echo $(OBJS)
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include $(MAKEDEFAULTDIR)/MakeStdLibRules.$(TARGET)
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/**
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* @file NI6528.h
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* @brief Header file for class NI6528
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* @date 07/06/2018
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* @author Andre Neto
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*
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* @copyright Copyright 2015 F4E | European Joint Undertaking for ITER and
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* the Development of Fusion Energy ('Fusion for Energy').
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* Licensed under the EUPL, Version 1.1 or - as soon they will be approved
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* by the European Commission - subsequent versions of the EUPL (the "Licence")
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* You may not use this work except in compliance with the Licence.
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* You may obtain a copy of the Licence at: http://ec.europa.eu/idabc/eupl
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*
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* @warning Unless required by applicable law or agreed to in writing,
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* software distributed under the Licence is distributed on an "AS IS"
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* basis, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express
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* or implied. See the Licence permissions and limitations under the Licence.
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* @details This header file contains the declaration of the class NI6528
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* with all of its public, protected and private members. It may also include
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* definitions for inline methods which need to be visible to the compiler.
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*/
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#ifndef RANDOM_DATASOURCE_H_
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#define RANDOM_DATASOURCE_H_
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/*---------------------------------------------------------------------------*/
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/* Standard header includes */
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/*---------------------------------------------------------------------------*/
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#include <pxi6528.h>
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/*---------------------------------------------------------------------------*/
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/* Project header includes */
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/*---------------------------------------------------------------------------*/
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#include "DataSourceI.h"
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/*---------------------------------------------------------------------------*/
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/* Class declaration */
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/*---------------------------------------------------------------------------*/
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/**
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* @brief NI6528 simplified data source implementation.
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*
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* The configuration syntax is (names and signal quantities are only given as an example):
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* +NI6528 = {
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* Class = NI6528
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* DeviceName = "/dev/pxi6528.0" //Mandatory
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* Port = 0 //The port where to write
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* Signals = {
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* currentValue = {Type = uint8}
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* bitmask = {Type = uint8}
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* Value = {Type = uint8}
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* }
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* }
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*/
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class NI6528: public MARTe::DataSourceI {
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public:
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CLASS_REGISTER_DECLARATION()
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/**
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* @brief Constructor. NOOP.
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*/
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NI6528 ();
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/**
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* @brief Destructor. NOOP.
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*/
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virtual ~NI6528();
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/**
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* @brief The configuration data detailed in the class description
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* @return true if all the compulsory parameters are set.
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*/
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virtual bool Initialise(MARTe::StructuredDataI & data);
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/**
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* @brief Verifies that at most one signal has been set with the correct type (i.e. any integer).
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* @return true if the above conditions are met.
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*/
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virtual bool SetConfiguredDatabase(MARTe::StructuredDataI & data);
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/**
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* @brief @see DataSourceI::Synchronise
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*/
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virtual bool Synchronise();
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/**
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* @brief @see DataSourceI::AllocateMemory
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*/
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virtual bool AllocateMemory();
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/**
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* @brief @see DataSourceI::GetSignalMemoryBuffer
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*/
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virtual bool GetSignalMemoryBuffer(const MARTe::uint32 signalIdx, const MARTe::uint32 bufferIdx, void *&signalAddress);
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/**
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* @return "MemoryMapSynchronisedInputBroker"
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*/
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virtual const MARTe::char8 *GetBrokerName(MARTe::StructuredDataI &data, const MARTe::SignalDirection direction);
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/**
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* @brief NOOP
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*/
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virtual bool PrepareNextState(const MARTe::char8 * const currentStateName, const MARTe::char8 * const nextStateName);
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private:
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/**
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* The previous value to write.
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*/
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MARTe::uint8 previousValue;
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/**
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* The bitmask to write value. (new value) = (current value) || (bitmask) && (write value)
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*/
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MARTe::uint8 bitmask;
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/**
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* The value to write.
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*/
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MARTe::uint8 value;
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/**
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* The port number
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*/
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MARTe::uint32 port;
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/**
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* The board file descriptor
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*/
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pxi6528_device_t boardFileDescriptor;
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/**
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* The device name
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*/
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MARTe::StreamString deviceName;
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};
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/*---------------------------------------------------------------------------*/
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/* Inline method definitions */
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/*---------------------------------------------------------------------------*/
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#endif /* RANDOM_DATASOURCE_H_ */
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