Generation working and Compilation of MARTe components

EC-GN-JA-PCF/.svn/pristine/5a/5a0b5adfec01b8975b3d744e668eb8bbfa786d5e.svn-base

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+#RULES_TOP
+include $(CONFIG)/RULES_TOP
+

EC-GN-JA-PCF/.svn/pristine/5a/5a9d8cde244a1fbbffafcede7c521c80e1feb54f.svn-base

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+record (bi,"EC-GN-P01-GAFP:FMC4310-RV1")
+{
+    field(DESC, "Reserved for cRIO")
+    field(DTYP, "asynInt32")
+    field(INP, "@asyn(ni6528_1, 11) bitread")
+    field(ONAM, "ON")
+    field(PINI, "YES")
+    field(SCAN, "I/O Intr")
+    field(SIML, "EC-GN-P01-GAF:STAT-DI-SIMM")
+    field(VAL, "0")
+    field(ZNAM, "OFF")
+}
+
+record (bi,"EC-GN-P01-GAFP:FMC4310-RV2")
+{
+    field(DESC, "Reserved for cRIO")
+    field(DTYP, "asynInt32")
+    field(INP, "@asyn(ni6528_1, 12) bitread")
+    field(ONAM, "ON")
+    field(PINI, "YES")
+    field(SCAN, "I/O Intr")
+    field(SIML, "EC-GN-P01-GAF:STAT-DI-SIMM")
+    field(VAL, "0")
+    field(ZNAM, "OFF")
+}
+
+record (bi,"EC-GN-P01-GAFP:FMC4310-RV3")
+{
+    field(DESC, "Reserved for cRIO")
+    field(DTYP, "asynInt32")
+    field(INP, "@asyn(ni6528_1, 13) bitread")
+    field(ONAM, "ON")
+    field(PINI, "YES")
+    field(SCAN, "I/O Intr")
+    field(SIML, "EC-GN-P01-GAF:STAT-DI-SIMM")
+    field(VAL, "0")
+    field(ZNAM, "OFF")
+}
+
+record (bo,"EC-GN-P01-GAFP:FMC4310-RV5")
+{
+    field(DESC, "Reserved for cRIO")
+    field(ONAM, "ON")
+    field(PINI, "YES")
+    field(SCAN, "Passive")
+    field(SIML, "EC-GN-P01-GAF:STAT-DO-SIMM")
+    field(VAL, "0")
+    field(ZNAM, "OFF")
+}
+
+record (bo,"EC-GN-P01-GAFP:FMC4310-RV6")
+{
+    field(DESC, "Reserved for cRIO")
+    field(ONAM, "ON")
+    field(PINI, "YES")
+    field(SCAN, "Passive")
+    field(SIML, "EC-GN-P01-GAF:STAT-DO-SIMM")
+    field(VAL, "0")
+    field(ZNAM, "OFF")
+}
+
+record (bo,"EC-GN-P01-GAFP:FMC4310-RV7")
+{
+    field(DESC, "Reserved for cRIO")
+    field(ONAM, "ON")
+    field(PINI, "YES")
+    field(SCAN, "Passive")
+    field(SIML, "EC-GN-P01-GAF:STAT-DO-SIMM")
+    field(VAL, "0")
+    field(ZNAM, "OFF")
+}
+
+record (bo,"EC-GN-P01-GAFP:FMC4310-RV8")
+{
+    field(DESC, "Reserved for cRIO")
+    field(ONAM, "ON")
+    field(PINI, "YES")
+    field(SCAN, "Passive")
+    field(SIML, "EC-GN-P01-GAF:STAT-DO-SIMM")
+    field(VAL, "0")
+    field(ZNAM, "OFF")
+}
+
+record (bi,"EC-GN-P01-GAFP:FMC4310-YFLT-OC")
+{
+    field(DESC, "MHVPS OC Detected")
+    field(DTYP, "asynInt32")
+    field(INP, "@asyn(ni6528_1, 5) bitread")
+    field(ONAM, "FAULT")
+    field(PINI, "YES")
+    field(SCAN, "I/O Intr")
+    field(SIML, "EC-GN-P01-GAF:STAT-DI-SIMM")
+    field(VAL, "0")
+    field(ZNAM, "NORMAL")
+}
+
+record (bi,"EC-GN-P01-GAFP:FMC4310-YFLT-OV")
+{
+    field(DESC, "MHVPS OV Detected")
+    field(DTYP, "asynInt32")
+    field(INP, "@asyn(ni6528_1, 4) bitread")
+    field(ONAM, "FAULT")
+    field(PINI, "YES")
+    field(SCAN, "I/O Intr")
+    field(SIML, "EC-GN-P01-GAF:STAT-DI-SIMM")
+    field(VAL, "0")
+    field(ZNAM, "NORMAL")
+}
+
+record (bo,"EC-GN-P01-GAFP:FMC4310-YSTA-GAOP")
+{
+    field(DESC, "GY1 Beam ON Status")
+    field(ONAM, "ON")
+    field(PINI, "YES")
+    field(SCAN, "Passive")
+    field(SIML, "EC-GN-P01-GAF:STAT-DO-SIMM")
+    field(VAL, "0")
+    field(ZNAM, "OFF")
+}
+
+record (bi,"EC-GN-P01-GAFP:FMC4310-YTRP")
+{
+    field(DESC, "Interlock from fast protection 1")
+    field(DTYP, "asynInt32")
+    field(INP, "@asyn(ni6528_1, 9) bitread")
+    field(ONAM, "INTERLOCK")
+    field(PINI, "YES")
+    field(SCAN, "I/O Intr")
+    field(SIML, "EC-GN-P01-GAF:STAT-DI-SIMM")
+    field(VAL, "0")
+    field(ZNAM, "NORMAL")
+}
+
+record (bi,"EC-GN-P01-GAFP:FMC4310-YTRP2")
+{
+    field(DESC, "Pause signal from Fast Protection 1")
+    field(DTYP, "asynInt32")
+    field(INP, "@asyn(ni6528_1, 10) bitread")
+    field(ONAM, "PAUSE")
+    field(PINI, "YES")
+    field(SCAN, "I/O Intr")
+    field(SIML, "EC-GN-P01-GAF:STAT-DI-SIMM")
+    field(VAL, "0")
+    field(ZNAM, "NORMAL")
+}
+

EC-GN-JA-PCF/.svn/pristine/5a/5af5f3c387e987f13e2ba0eae94207a440e68703.svn-base

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+//+======================================================================
+// $HeadURL: https://svnpub.iter.org/codac/iter/codac/dev/units/m-sdd-translator-parts/tags/CODAC-CORE-6.0.0/org.iter.codac.sdd.translators/src/main/resources/templates/sdn/includetopics.h.vm $
+// $Id: includetopics.h.vm 83098 2018-01-08 13:23:38Z cesnikt $
+//
+// Project       : CODAC Core System
+//
+// Description   : SDN Program - Gyrotron01DAN
+//
+// Author        : Kirti Mahajan, Lana Abadie and TCS (link with velocity and SDD model)
+//
+// Copyright (c) : 2010-2018 ITER Organization,
+//                 CS 90 046
+//                 13067 St. Paul-lez-Durance Cedex
+//                 France
+//
+// This file is part of ITER CODAC software.
+// For the terms and conditions of redistribution or use of this software
+// refer to the file ITER-LICENSE.TXT located in the top level directory
+// of the distribution package.
+//
+//-======================================================================
+
+#ifndef INCLUDETOPICS_H
+#define INCLUDETOPICS_H
+
+#include <sdn.h>
+
+
+#endif